1. Field of the Invention
This invention relates to digital computer systems having busses for connection to external devices. More particularly, this invention pertains to digital computer systems that have facility for adjusting the system clock frequency to approximately that of the associated bus.
2. Description of the Prior Art
As digital computer system operating speeds have increased, associated bus systems for addressing external devices have not kept pace. It has been necessary for the computer systems to "slow down" to accommodate such busses.
A prior art system has involved adding wait states to a memory access involving the associated bus so that the total time taken is the same as if the system clock frequency were equal to that of the associated bus. This system of using wait states has the disadvantage of abbreviating the addresses and decoding of addresses at the beginning of the cycle.
The present invention has a facility for actually adjusting the clock frequency of the computer system to approximately that of the associated bus to avoid these deleterious effects.